I've successfully set up a BISS-C encoder on an ACC-84E on Turbo hardware once, so take what I'm suggesting with a grain of salt.
I'll break out the SerialEncCtrl and SerialEncCmd setups from the above registers to confirm that they're as intended:
SerialEncCtrl:
- Serial Frequency: 8.333_ Mhz
- Trigger on Phase clock, falling edge
- no trigger output delay
- BiSS-C protocol
SerialEncCmd:
- CRC mask = $15
- BiSS-C protocol
- (support of MCD bit=0)?
- SerialEncTrigMode=0 - continuous sampling
- SerialEncTrigEna=1 - enable trigger on
- SerialEncStatusBits=2
- SerialEncNumBits=36
Two notes:
1. Renishaw documentation suggests a maximum trigger rate of 25kHz. The phase clock in your setup is 20kHz, so this should be within spec.
_However_, if you look inside the included Renishaw BiSS-C mode documentation (L-9709-9005-03-F, page 3) this rate is too high to operate without line delay compensation.
For prototyping could you slow the phase/servo clock and the serial encoder frequency and confirm the itntegrity of the serial communications ?
2. The CRC mask shown above doesn't appear to match the Renishaw/CRC standard. The documentation (again, L-9709-9005-03-F, page 2) shows the CRC calculation as x^6+x^1+x^0==$43, rather than $15?
Here, could you check that EncTable[6].index3..6 are equal to zero?
In particular, I see that if index4 !=0 then the encoder value will be integrated, per the Power PMAC Users manual, page 198:
Finally, I've also attached the Excel spreadsheet that I found somewhere else on the forums, which I used to tease out the functions from the encoder control and command registers.
-Jeff Dickert
-Berkeley Center for Structural Biology
-ALS - Beamline Controls Group L-9709-9005-03-F.PDF Technical note 40_02_CRC Calculation.pdf PPMAC_Acc84E-Biss_setup-1.xls