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J0hann

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Posts posted by J0hann

  1. Hello all !

     

    I won't detail everything here, because it may be of no interest for most, but I managed to configure one single project compiling and working successfully on UMAC, PowerBrickAC, CK3E (Acontis stack) and Etherlite (Etherlab stack).

     

    Up to IDE3, I used to configure all my controllers using .pmc files at startup. Basically, the new "System" folder of IDE4 can be completely ignore as long as some .pmc files keep configuring the sys, motor and enctable structures, EXCEPT for the EtherCAT folder in Acontis stack. For Etherlab stack, the ECAT structure can still be configured using a .pmc file, but you must go through the new EtherCAT folder/tool of IDE4 if you want to have your EtherCAT network working on a CK3E.

     

    In the end, only the endianess and mounting points defers from UMAC/PowerBrickAC/Etherlite and CK3E, which is quite easy to manage.

  2. Dear insiders,

     

    Could you guide me on the right way to manage the new (IDE4) System Folder files when I have a single versioned project built on different hardware architectures ?

     

    I explain myself: I have been using DT controllers for a while now (since firmware 1.6, and IDE 2.xxxx). Our company project is versioned using svn and we are trying to stick on one single trunk, avoiding branches at maximum.

     

    Currently, my trunk is built for IDE 3, and we manage the controller and ECAT configuration during the controller boot (we are using UMAC racks, PowerBricks and Etherlites). When IDE 4 came out, I created a branch as this IDE was dedicated to CK3E. The problem is that, with ACONTIS stack, I cannot configure the EtherCAT configuration at boot anymore, directly filling the ECAT[] structure: it must be done using an .xml file and some IDE interactions. Because of this, each of my project having a different EtherCAT drives and/or IO configuration requires a new branch...

     

    The last IDE version, 2.4.1.2 is supposed to deal with all these controllers. Which is great ! I would like to fuse all my projects in a single one. How can I do that ? Is it even possible ?

     

    Thanks in advance !

  3. A priceless post Kejr, thank you a thousand times for it.

    I found it incredible that the internal memory is relegated to /dev/sdb when the unit starts with a flash drive plugged.

     

    So, same story for me, I used to insert SD cards in my other DT units and to edit the fstab for mounting the SD card on a specific path. When I was receiving any new unit, I was replacing the fstab file, among others, and that was it. Now it is more tricky: the fstab file contains the internal memory UUID ! So it must be edited. And your idea of using the "by-path" is just great.

     

    On my side, I have switched to FAT32. Our computers are now all in Windows10 and it is not possible to install ext fs drivers anymore. And we sometime need to recover data from the flash drive manually. So, for the record, I am using the following instruction in fstab:

     

    /dev/disk/by-path/platform-xhci-hcd.0.auto-usb-0:1.2:1.0-scsi-0:0:0:0-part1 /media/disk-0 vfat rw,user,umask=000 0 2

     

    I am mounting the vfat flash drive on /media/disk-0. The Linux cannot manage the access right using chmod on FAT32 fs, so the mounting options are just here to mount the flash drive in rw mode.

  4. UPDATE 11/8/17 NEW INSTALL with Version 3.1.1.0 has same Issue.

     

    It will fail to install with same error, MySql won't Start.

    Need to do same fix to ppmac.ini file as before and re-install.

     

    Hello Mike,

     

    Hi have a similar issue on IDE v.4: I'm trying to update my IDE from 4.0.3.0 to 4.1.0.24 using the patch installation. At the very beginning of the installation (as administrator), I have an MYSQL failure message:

     

    "Failed to install the 'MySQL' tables required for PowerPMAC IDE (error code: failed to get port). Please try rebooting the PC and running the installer again."

     

    I updated the .ini file but it did not work, the problem might be a different one.

    Have you encountered this ? Do you have any fix ?

     

    Thanks !

     

    EDIT: solved by uninstalling everything and installing directly the full 4.1.0.24 firmware.

  5. Thanks for the replying Steve. I clean the project before every single compilation. Besides, I have several projects (I am using PPMAC for different kind of robotic architectures) and thus often unload/load projects. This doesn't correct my problem, and I add that I have these warnings for all of my current projects.
  6. Hi Insiders,

     

    I've got warnings at the useralgo.ko compilation since I updated my IDE to versions 3 I cannot get ride of. I have been seeing them for several months and they don't prevent my project to run properly, so I didn't pay much attention to them. However, I'd really like to solve the problem and to make these warning disappear. It seems that some ethernet-related headers are missing the library, since the message says "'struct sockaddr' declared inside parameter list".

     

    Do you have any clue of what could be done to solve this problem ?

     

    Here is my compilation output on a new project, compiled with the IDE 3.1.4.0 on an Etherlite in firmware v.2.4.0.180.

     

    ------ Build started: Project: PowerPMAC1, Configuration: Debug Any CPU ------

    Please wait while mapping PowerPMAC variables.

    End of synchronizing the Database.

    PowerPMAC variables mapped successfully.

    Build process for capp1.out has started.

    Build process for capp1.out has ended.

     

    Build process for usralgo.ko has started.

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(14,0): warning : in file included from /usr/local/dtlibs/libopener/cipcommon.h

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\..\libppmac\ethernetip.h(14,0): warning : in file included from /usr/local/dtlibs/rtpmac/../libppmac/ethernetip.h

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\RtGpShm.h(82,0): warning : in file included from /usr/local/dtlibs/rtpmac/RtGpShm.h

    C:\Users\J.Lamaury\Desktop\PowerPMAC1\PowerPMAC1\C Language\Realtime Routines\usralgomain.c(41,0): warning : in file included from /cygdrive/c/Users/J27CE~1.LAM/Desktop/POWERP~1/POWERP~1/CLANGU~1/REALTI~1/usralgomain.c

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\ciptypes.h(299,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\ciptypes.h(299,0): warning : its scope is only this definition or declaration, which is probably not what you want

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\..\libppmac\ethernetip.h(14,0): warning : in file included from /usr/local/dtlibs/rtpmac/../libppmac/ethernetip.h

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\RtGpShm.h(82,0): warning : in file included from /usr/local/dtlibs/rtpmac/RtGpShm.h

    C:\Users\J.Lamaury\Desktop\PowerPMAC1\PowerPMAC1\C Language\Realtime Routines\usralgomain.c(41,0): warning : in file included from /cygdrive/c/Users/J27CE~1.LAM/Desktop/POWERP~1/POWERP~1/CLANGU~1/REALTI~1/usralgomain.c

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(39,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(57,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(71,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(14,0): warning : in file included from /usr/local/dtlibs/libopener/cipcommon.h

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\..\libppmac\ethernetip.h(14,0): warning : in file included from /usr/local/dtlibs/rtpmac/../libppmac/ethernetip.h

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\RtGpShm.h(82,0): warning : in file included from /usr/local/dtlibs/rtpmac/RtGpShm.h

    C:\Users\J.Lamaury\Desktop\PowerPMAC1\PowerPMAC1\C Language\Realtime Routines\usrcode.h(9,0): warning : in file included from /cygdrive/c/Users/J27CE~1.LAM/Desktop/POWERP~1/POWERP~1/CLANGU~1/REALTI~1/usrcode.h

    C:\Users\J.Lamaury\Desktop\PowerPMAC1\PowerPMAC1\C Language\Realtime Routines\usrcode.c(20,0): warning : in file included from /cygdrive/c/Users/J27CE~1.LAM/Desktop/POWERP~1/POWERP~1/CLANGU~1/REALTI~1/usrcode.c

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\ciptypes.h(299,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\ciptypes.h(299,0): warning : its scope is only this definition or declaration, which is probably not what you want

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\..\libppmac\ethernetip.h(14,0): warning : in file included from /usr/local/dtlibs/rtpmac/../libppmac/ethernetip.h

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\rtpmac\RtGpShm.h(82,0): warning : in file included from /usr/local/dtlibs/rtpmac/RtGpShm.h

    C:\Users\J.Lamaury\Desktop\PowerPMAC1\PowerPMAC1\C Language\Realtime Routines\usrcode.h(9,0): warning : in file included from /cygdrive/c/Users/J27CE~1.LAM/Desktop/POWERP~1/POWERP~1/CLANGU~1/REALTI~1/usrcode.h

    C:\Users\J.Lamaury\Desktop\PowerPMAC1\PowerPMAC1\C Language\Realtime Routines\usrcode.c(20,0): warning : in file included from /cygdrive/c/Users/J27CE~1.LAM/Desktop/POWERP~1/POWERP~1/CLANGU~1/REALTI~1/usrcode.c

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(39,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(57,0): warning : 'struct sockaddr' declared inside parameter list

    C:\Users\J27CE~1.LAM\Desktop\POWERP~1\POWERP~1\CLANGU~1\REALTI~1\\\usr\local\dtlibs\libopener\cipcommon.h(71,0): warning : 'struct sockaddr' declared inside parameter list

    Build process for usralgo.ko has ended.

     

    Build process for usralgo.so has started.

    Build process for usralgo.so has ended.

     

    Project Building and Mapping total time = 10.675 sec

    ========== Build: 1 succeeded or up-to-date, 0 failed, 0 skipped ==========

     

    Thanks in advance !

  7. Hello all !

     

    Does anyone know if the CK3E supports EoE ?

    I've found no mention of it on Ck3E documentations. However, this unit has Acontis-based EtherCAT which is supposed to supports all mailbox protocols, including EoE. EC-Engineer seems to allow the activation of EoE on drives, but I couldn't find any way to enable the virtual switch on the Master (here the CK3E).

     

    Unfortunately, I am using new drives having only one Ethernet port, which means I absolutely need to activate EoE in order to have online status information.

     

    Thanks in advance !

  8. OK I find what my problem was. Using the linux "top" and "watch -n 0.5 cat /proc/xenomai/stat" commands, I could see that one of my debug process overload the CPU (idle dropped less that 1%). Disabling this debug process (basically high frequency logs) help the idle to rise back to 40%: no more hardware WD.
  9. Hello guys,

     

    I have the same problem here: two PowerBrickAC-based system with multiple axes falling into hardware watchdog state randomly.

    Having a lot of C code, both in background programs and RTI, I am familiar with DT software watchdogs, but hardware ones? I have no idea how to debug them.

     

    I am curious about your solution, the critical interrupt disabling. How could you do this ? You mentioned a patch; could you tell me where did you find it ?

     

    Thanks a lot !

     

    Johann

  10. Hi Charles,

     

    Thank you very much for these codes, it will be useful to me.

    However these functions are just about the reading. By chance, would you have coded the writing version ?

     

    Thanks in advance !

  11. Basically we have dug up the following:

    The AL_State is different from the AL_Status_Code. The Master stack will usually auto-acknowledge errors and try configuring again, so the "E" state will be transitory. An exception occurs if it encountered an unrecoverable error, or timed out while trying to enable, in which case the error will show up in both the AL_State and AL_Status_Code. We test that error bit and add the "+ E" to the state print out. Why the PILZ device is showing 0x00 for the AL_Status_Code is unknown. We just read and report the slaves values.

     

    Thank you so much for trying to make this progress !

     

    I have the following AL_Status at startup (I issued an ecat slaves): 0 VID=$00000569 PC=$000BC828 0:0 PREOP + PNOZ m ES EtherCAT (1.1)

    And then after activating the Master tasks: 0 VID=$00000569 PC=$000BC828 0:0 SAFEOP E PNOZ m ES EtherCAT (1.1)

     

    Note that the "E" remains, so according to what you said, the salve issued an unrecoverable error, or timed out while trying to enable. However, as before, have no information is the AL_Status register:

     

    system ethercat -m0 -p0 reg_read 0x0130 2

    0x04 0x00

     

    system ethercat -m0 -p0 reg_read 0x0134 2

    0x00 0x00

     

    I am in daily contact with PILZ. Apparently, they used an IgH Master in order to setup the module and it worked:

     

    "This case is confusing. Our development is not able to reproduce this behavior even if they have this ign master. We think its a problem of the master and not of our device so maybe its the best way if the customer asks ign for help."

     

    According to them, it could come from a too short AL state change timeout. Apparently, IgH Masters have a default value of 5 seconds, and they advised me to set it to 30 seconds:

     

    "Change the following value to 30: ( fsm_change.c Line 45)

     

    /** Timeout while waiting for AL state change .

    */

    #define EC_AL_STATE_CHANGE_TIMEOUT 5"

     

    However, I do not have access to fsm_change.c which is compiled in a library in the following PPMAC path: /opt/etherlab/lib.

    Do you know how this value can be change in the PPMAC ?

     

    "Regarding your main issue of set up problems. Did PILZ provide an application note, or setup document? Generally, the FSoE programming and device commissioning must be done from the OEM's software. Then the device must be configured with the master. All mandatory PDO's must be mapped. Additionally, the FSoE Outputs must be set equal to the FSoE Inputs, keeping size and type the same.

     

    Additionally, the EtherCAT Slave Information (ESI) file is critical. Currently we only support the flat ESI.xml file structure and do not support the MDP (linked) file structure. If MDP is what you have then PILZ may be helpful in getting you a flat ESI.xml file, also known as standard DS402 ESI file.

     

    I hope this helps.

     

    OEM software was indeed used to configure the module. I am going to check out FSoE configuration, but I think it is OK. Furthermore, I guess their XML file is flat as th IDE System Setup tool could update the device with it.

     

    Thanks again !

  12. I suspected that the 'Err' slave status illustrated in my first post was the AL control word. What is indeed annoying is that the Master seemed to acknowledge it (as it detected the 'PREOP + E'), but the reg_read of the AL Status Code returns 0 on all of its sub-indexes. Maybe a specific process cleared this field ?

     

    Thus I have no idea of what is the error origin and I am completely stuck...

  13. First of all, thanks for the quick reply !

     

    I know this documentation very well, and I became familiar with the ECAT setup procedure. I am currently working on another project with several ECAT drives and everything is working properly.

     

    There is just this single project involving a PILZ safety module where the problem arises.

     

    The timeout you mentioned is not the one I am looking for, as it concerns the motor ECAT structure. The PILZ tech support told me to modify the ECAT state timeout (basically the time the controller will wait after an AL control request before falling in error state if the slave AL status has not reached the requested state).

     

    As they pointed out, other master constructors (Beckhoff, Siemens) let the user setup this parameter through SDO. This is not the PPMAC case (at least I could not find it). Furthermore, the PILZ tech support seems not having this parameter address... No comment about that.

     

    In order to understand where the problem lies, I need to know what is the Slave Status Err the PPMAC returns (you did not answer to that). The Master seems to know an error occured, but the AL Status Code is empty ! Therefore, I need to access the error information the PPMAC reads.

  14. Hello all,

     

    I have issues setting up an EtherCAT I/O device (PILZ PNOZ multi 2):

    I cannot make it change of state from 'SAFEOP' to 'OP'.

     

    When in 'SAFEOP' slave state, I activate the Master[0] tasks. Then the slave state changes as 'SAFEOP' -> 'PREOP' + Err (see first attachment).

     

    My problème is that the AL Status Code is empty (see second attachment)! As you can see, the AL control returns an error acknowledge but the AL status code is empty. I contacted the slave vendor but they sent me back to the master one, saying that it is a bad Master configuration.

     

    My first question is: do you know what the IDE "Slave status Error" is reading ? Is it a master error generation or the reading of a slave register ?

     

    Secondly: Do you know what could, in the master configuration, prevent an I/O module to pass to the 'OP' state ? PILZ told me about a slave state timeout parameter that could be set too low by the master, but I could not find anyway to modify it.

     

    Thanks in advance for the reply !

    err.JPG.7a21c967c7eab51da1c9dee37f3ce831.JPG

    1060771624_ALstatus.thumb.JPG.fa7b563ee32d9c1ee110439b280d8197.JPG

  15. In order to complete my previous post, I used the System V queue functions in rtiplc.c and could observed the mode switches (see the attachement).

     

    If I activate the functions (msgsend, msgrecv), the mode switch number increase at the rti frequency. If I deactivate them, the increasing stops.

     

    I am kind of stuck... The rti does not have any access to the Xenomai API (preventing the use of the POSIX functions) and the System V functions makes the rti to switch a lot. Thus, I have absolutely no synchronized mechanism to safely exchange between capp and rti processes (do I have ?).

     

    By curiosity, I tested the DeltaTau send() and getsends() functions inside the rti and they did not make it switch. What is their underlying mechanism ? Would it be possible to use it for data exchange between the capp and rti processes ?

    switches_sysv_queues.JPG.774ff59beba60a256d5b57d8b2b1e550.JPG

  16. Hello all,

     

    I have another interrogation ! Is it possible, through the Power Pmac Suite, to link some external C libraries (static and/or dynamic) to the active project? I could not figured that out. Typically, I need to link one of my own static library of application functions plus an XML library.

     

    Thank you for supporting !

  17. Hi Charles, thank you for replying.

     

    We have used the pushm for handling the error management so far. However this strategy suffers from many drawbacks that are all corrected by the Linux queue system.

     

    First of all, the shared memory is not synchronised. It happens that a process read a shared memory which is being written by another process. I have made some test showing it and this is very critic !

     

    Furthermore it is complicated to transmit many data. Imagine your different processes write structures inside the shared memory at the same time. How do you manage the data priority and order? What rules will you give to your reader process ? All these questions find answers with Linux queues. Besides, I'm already using them for passing data from capps to other capps.

     

    Now I want to do the same between the capps and the rtiplc but I can't make it work. It seems that the cplc files cannot access the Xenomai API. Is it expected?

     

    Thanks again !

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