DT-Europe Posted November 26, 2008 Share Posted November 26, 2008 We try to do Array with PTR format pointing to User memory. So, we do: PTR Myvar(16)->u.user.$1000 After download, we see that Myvar is M8192 on our mapping and of course, next 15 M_variables are reserved, which is OK. We check then the pointing of M8192 to M8208 and they are all pointing to the same location, address $1000 We see: M8192->u.user:$1000 M8193->u.user:$1000 M8194->u.user:$1000 and so on. We should have an index of 4 (because of the u format): M8192->u.user:$1000 M8193->u.user:$1004 M8194->u.user:$1008 and so on. We did the same test with d format instead of u format and we have same problem. We see: M8192->d.user:$1000 M8193->d.user:$1000 M8194->d.user:$1000 We should have an index of 8 (because of the d format): M8192->d.user:$1000 M8193->d.user:$1008 M8194->d.user:$1016 and so on. So, we think that this is a bug to fix. We are using Firmware 0.9 of NOV 20 2008 Link to comment Share on other sites More sharing options...
bradp Posted March 19, 2009 Share Posted March 19, 2009 The Ptr arrays are now working in the 460 PPmac. In the IDE the syntax is: ptr test1(16)->u.io:$a00000.8.8+ The "+" after the definition will increment the address by 4. The raw PPMAC command is: m100,16->u.io:$a00000.8.8 The results of this command are like the following. M100->u.io:$a00000.8.8 M101->u.io:$a00004.8.8 M102->u.io:$a00008.8.8 M103->u.io:$a0000c.8.8 M104->u.io:$a00010.8.8 M105->u.io:$a00014.8.8 M106->u.io:$a00018.8.8 M107->u.io:$a0001c.8.8 M108->u.io:$a00020.8.8 M109->u.io:$a00024.8.8 M110->u.io:$a00028.8.8 M111->u.io:$a0002c.8.8 M112->u.io:$a00030.8.8 M113->u.io:$a00034.8.8 M114->u.io:$a00038.8.8 M115->u.io:$a0003c.8.8 Link to comment Share on other sites More sharing options...
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