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ACC65E and other IO accessory cards


bradp
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As described in the PPmac documentation you can address the ACC65E and other IO cards using their physical address. See the manual "Power PMAC Suggested IO Pointer Declarations.doc" under thread http://forums.deltatau.com/showthread.php?tid=85 In the PPmac script language, if you prefer to work with structures then you can use them directly in your code and in the terminal of the IDE or you can use #defines to add more meaning to the names. Here is a sample for PPMAC script language with an ACC65E. The first uses the specific ACC65E[] structure. The second uses the general GateIo[] structure. The third uses the IDE's auto assignment feature for Pointer (M-variables). All are essentially equivalent. //---------------------- specific ACC65E[] defintions ---------------- // make bit pointers to the ACC65Es // ACC65E[0].DataReg #define c0MyInputs1_8 ACC65E[0].DataReg[0] // I/O Card 0 I/O 00-07 as byte #define c0MyInputs9_16 ACC65E[0].DataReg[1] // I/O Card 0 I/O 08-15 as byte #define c0MyInputs17_24 ACC65E[0].DataReg[2] // I/O Card 0 I/O 16-23 as byte #define c0MyOutputs1_8 ACC65E[0].DataReg[3] // I/O Card 0 I/O 24-31 as byte #define c0MyOutputs9_16 ACC65E[0].DataReg[4] // I/O Card 0 I/O 32-39 as byte #define c0MyOutputs17_24 ACC65E[0].DataReg[5] // I/O Card 0 I/O 40-47 as byte #define c0In01 ACC65E[0].DataReg[0].0.1 // input 01 #define c0In02 ACC65E[0].DataReg[0].1.1 // input 02 #define c0In03 ACC65E[0].DataReg[0].2.1 // input 03 #define c0In04 ACC65E[0].DataReg[0].3.1 // input 04 #define c0In05 ACC65E[0].DataReg[0].4.1 // input 05 #define c0In06 ACC65E[0].DataReg[0].5.1 // input 06 #define c0In07 ACC65E[0].DataReg[0].6.1 // input 07 #define c0In08 ACC65E[0].DataReg[0].7.1 // input 08 #define c0In09 ACC65E[0].DataReg[1].0.1 // input 09 #define c0In10 ACC65E[0].DataReg[1].1.1 // input 10 #define c0In11 ACC65E[0].DataReg[1].2.1 // input 11 #define c0In12 ACC65E[0].DataReg[1].3.1 // input 12 #define c0In13 ACC65E[0].DataReg[1].4.1 // input 13 #define c0In14 ACC65E[0].DataReg[1].5.1 // input 14 #define c0In15 ACC65E[0].DataReg[1].6.1 // input 15 #define c0In16 ACC65E[0].DataReg[1].7.1 // input 16 #define c0In17 ACC65E[0].DataReg[2].0.1 // input 17 #define c0In18 ACC65E[0].DataReg[2].1.1 // input 18 #define c0In19 ACC65E[0].DataReg[2].2.1 // input 19 #define c0In20 ACC65E[0].DataReg[2].3.1 // input 20 #define c0In21 ACC65E[0].DataReg[2].4.1 // input 21 #define c0In22 ACC65E[0].DataReg[2].5.1 // input 22 #define c0In23 ACC65E[0].DataReg[2].6.1 // input 23 #define c0In24 ACC65E[0].DataReg[2].7.1 // input 24 #define c0Out01 ACC65E[0].DataReg[3].0.1 // output 01 #define c0Out02 ACC65E[0].DataReg[3].1.1 // output 02 #define c0Out03 ACC65E[0].DataReg[3].2.1 // output 03 #define c0Out04 ACC65E[0].DataReg[3].3.1 // output 04 #define c0Out05 ACC65E[0].DataReg[3].4.1 // output 05 #define c0Out06 ACC65E[0].DataReg[3].5.1 // output 06 #define c0Out07 ACC65E[0].DataReg[3].6.1 // output 07 #define c0Out08 ACC65E[0].DataReg[3].7.1 // output 08 #define c0Out09 ACC65E[0].DataReg[4].0.1 // output 09 #define c0Out10 ACC65E[0].DataReg[4].1.1 // output 10 #define c0Out11 ACC65E[0].DataReg[4].2.1 // output 11 #define c0Out12 ACC65E[0].DataReg[4].3.1 // output 12 #define c0Out13 ACC65E[0].DataReg[4].4.1 // output 13 #define c0Out14 ACC65E[0].DataReg[4].5.1 // output 14 #define c0Out15 ACC65E[0].DataReg[4].6.1 // output 15 #define c0Out16 ACC65E[0].DataReg[4].7.1 // output 16 #define c0Out17 ACC65E[0].DataReg[5].0.1 // output 17 #define c0Out18 ACC65E[0].DataReg[5].1.1 // output 18 #define c0Out19 ACC65E[0].DataReg[5].2.1 // output 19 #define c0Out20 ACC65E[0].DataReg[5].3.1 // output 20 #define c0Out21 ACC65E[0].DataReg[5].4.1 // output 21 #define c0Out22 ACC65E[0].DataReg[5].5.1 // output 22 #define c0Out23 ACC65E[0].DataReg[5].6.1 // output 23 #define c0Out24 ACC65E[0].DataReg[5].7.1 // output 24 //---------------------- general GateIo[] definitions ----------------- // make bit pointers to the ACC65Es // GateIo[0].DataReg #define c0MyInputs1_8 GateIo[0].DataReg[0] // I/O Card 0 I/O 00-07 as byte #define c0MyInputs9_16 GateIo[0].DataReg[1] // I/O Card 0 I/O 08-15 as byte #define c0MyInputs17_24 GateIo[0].DataReg[2] // I/O Card 0 I/O 16-23 as byte #define c0MyOutputs1_8 GateIo[0].DataReg[3] // I/O Card 0 I/O 24-31 as byte #define c0MyOutputs9_16 GateIo[0].DataReg[4] // I/O Card 0 I/O 32-39 as byte #define c0MyOutputs17_24 GateIo[0].DataReg[5] // I/O Card 0 I/O 40-47 as byte #define c0In01 GateIo[0].DataReg[0].0.1 // input 01 #define c0In02 GateIo[0].DataReg[0].1.1 // input 02 #define c0In03 GateIo[0].DataReg[0].2.1 // input 03 #define c0In04 GateIo[0].DataReg[0].3.1 // input 04 #define c0In05 GateIo[0].DataReg[0].4.1 // input 05 #define c0In06 GateIo[0].DataReg[0].5.1 // input 06 #define c0In07 GateIo[0].DataReg[0].6.1 // input 07 #define c0In08 GateIo[0].DataReg[0].7.1 // input 08 #define c0In09 GateIo[0].DataReg[1].0.1 // input 09 #define c0In10 GateIo[0].DataReg[1].1.1 // input 10 #define c0In11 GateIo[0].DataReg[1].2.1 // input 11 #define c0In12 GateIo[0].DataReg[1].3.1 // input 12 #define c0In13 GateIo[0].DataReg[1].4.1 // input 13 #define c0In14 GateIo[0].DataReg[1].5.1 // input 14 #define c0In15 GateIo[0].DataReg[1].6.1 // input 15 #define c0In16 GateIo[0].DataReg[1].7.1 // input 16 #define c0In17 GateIo[0].DataReg[2].0.1 // input 17 #define c0In18 GateIo[0].DataReg[2].1.1 // input 18 #define c0In19 GateIo[0].DataReg[2].2.1 // input 19 #define c0In20 GateIo[0].DataReg[2].3.1 // input 20 #define c0In21 GateIo[0].DataReg[2].4.1 // input 21 #define c0In22 GateIo[0].DataReg[2].5.1 // input 22 #define c0In23 GateIo[0].DataReg[2].6.1 // input 23 #define c0In24 GateIo[0].DataReg[2].7.1 // input 24 #define c0Out01 GateIo[0].DataReg[3].0.1 // output 01 #define c0Out02 GateIo[0].DataReg[3].1.1 // output 02 #define c0Out03 GateIo[0].DataReg[3].2.1 // output 03 #define c0Out04 GateIo[0].DataReg[3].3.1 // output 04 #define c0Out05 GateIo[0].DataReg[3].4.1 // output 05 #define c0Out06 GateIo[0].DataReg[3].5.1 // output 06 #define c0Out07 GateIo[0].DataReg[3].6.1 // output 07 #define c0Out08 GateIo[0].DataReg[3].7.1 // output 08 #define c0Out09 GateIo[0].DataReg[4].0.1 // output 09 #define c0Out10 GateIo[0].DataReg[4].1.1 // output 10 #define c0Out11 GateIo[0].DataReg[4].2.1 // output 11 #define c0Out12 GateIo[0].DataReg[4].3.1 // output 12 #define c0Out13 GateIo[0].DataReg[4].4.1 // output 13 #define c0Out14 GateIo[0].DataReg[4].5.1 // output 14 #define c0Out15 GateIo[0].DataReg[4].6.1 // output 15 #define c0Out16 GateIo[0].DataReg[4].7.1 // output 16 #define c0Out17 GateIo[0].DataReg[5].0.1 // output 17 #define c0Out18 GateIo[0].DataReg[5].1.1 // output 18 #define c0Out19 GateIo[0].DataReg[5].2.1 // output 19 #define c0Out20 GateIo[0].DataReg[5].3.1 // output 20 #define c0Out21 GateIo[0].DataReg[5].4.1 // output 21 #define c0Out22 GateIo[0].DataReg[5].5.1 // output 22 #define c0Out23 GateIo[0].DataReg[5].6.1 // output 23 #define c0Out24 GateIo[0].DataReg[5].7.1 // output 24 //---------------------- Pointer Style GateIo[] definitions ----------------- // GateIo[0].DataReg ptr c0MyInputs01_08->GateIo[0].DataReg[0] ;// I/O Card 4 I/O 00-07 as byte ptr c0MyInputs09_16->GateIo[0].DataReg[1] ;// I/O Card 4 I/O 08-15 as byte ptr c0MyInputs17_24->GateIo[0].DataReg[2] ;// I/O Card 4 I/O 16-23 as byte ptr c0MyOutputs01_08->GateIo[0].DataReg[3] ;// I/O Card 4 I/O 24-31 as byte ptr c0MyOutputs09_16->GateIo[0].DataReg[4] ;// I/O Card 4 I/O 32-39 as byte ptr c0MyOutputs17_24->GateIo[0].DataReg[5] ;// I/O Card 4 I/O 40-47 as byte ptr c0In01->GateIo[0].DataReg[0].0.1 ;// input 01 ptr c0In02->GateIo[0].DataReg[0].1.1 ;// input 02 ptr c0In03->GateIo[0].DataReg[0].2.1 ;// input 03 ptr c0In04->GateIo[0].DataReg[0].3.1 ;// input 04 ptr c0In05->GateIo[0].DataReg[0].4.1 ;// input 05 ptr c0In06->GateIo[0].DataReg[0].5.1 ;// input 06 ptr c0In07->GateIo[0].DataReg[0].6.1 ;// input 07 ptr c0In08->GateIo[0].DataReg[0].7.1 ;// input 08 ptr c0In09->GateIo[0].DataReg[1].0.1 ;// input 09 ptr c0In10->GateIo[0].DataReg[1].1.1 ;// input 10 ptr c0In11->GateIo[0].DataReg[1].2.1 ;// input 11 ptr c0In12->GateIo[0].DataReg[1].3.1 ;// input 12 ptr c0In13->GateIo[0].DataReg[1].4.1 ;// input 13 ptr c0In14->GateIo[0].DataReg[1].5.1 ;// input 14 ptr c0In15->GateIo[0].DataReg[1].6.1 ;// input 15 ptr c0In16->GateIo[0].DataReg[1].7.1 ;// input 16 ptr c0In17->GateIo[0].DataReg[2].0.1 ;// input 17 ptr c0In18->GateIo[0].DataReg[2].1.1 ;// input 18 ptr c0In19->GateIo[0].DataReg[2].2.1 ;// input 19 ptr c0In20->GateIo[0].DataReg[2].3.1 ;// input 20 ptr c0In21->GateIo[0].DataReg[2].4.1 ;// input 21 ptr c0In22->GateIo[0].DataReg[2].5.1 ;// input 22 ptr c0In23->GateIo[0].DataReg[2].6.1 ;// input 23 ptr c0In24->GateIo[0].DataReg[2].7.1 ;// input 24 ptr c0Out01->GateIo[0].DataReg[3].0.1 ;// output 01 ptr c0Out02->GateIo[0].DataReg[3].1.1 ;// output 02 ptr c0Out03->GateIo[0].DataReg[3].2.1 ;// output 03 ptr c0Out04->GateIo[0].DataReg[3].3.1 ;// output 04 ptr c0Out05->GateIo[0].DataReg[3].4.1 ;// output 05 ptr c0Out06->GateIo[0].DataReg[3].5.1 ;// output 06 ptr c0Out07->GateIo[0].DataReg[3].6.1 ;// output 07 ptr c0Out08->GateIo[0].DataReg[3].7.1 ;// output 08 ptr c0Out09->GateIo[0].DataReg[4].0.1 ;// output 09 ptr c0Out10->GateIo[0].DataReg[4].1.1 ;// output 10 ptr c0Out11->GateIo[0].DataReg[4].2.1 ;// output 11 ptr c0Out12->GateIo[0].DataReg[4].3.1 ;// output 12 ptr c0Out13->GateIo[0].DataReg[4].4.1 ;// output 13 ptr c0Out14->GateIo[0].DataReg[4].5.1 ;// output 14 ptr c0Out15->GateIo[0].DataReg[4].6.1 ;// output 15 ptr c0Out16->GateIo[0].DataReg[4].7.1 ;// output 16 ptr c0Out17->GateIo[0].DataReg[5].0.1 ;// output 17 ptr c0Out18->GateIo[0].DataReg[5].1.1 ;// output 18 ptr c0Out19->GateIo[0].DataReg[5].2.1 ;// output 19 ptr c0Out20->GateIo[0].DataReg[5].3.1 ;// output 20 ptr c0Out21->GateIo[0].DataReg[5].4.1 ;// output 21 ptr c0Out22->GateIo[0].DataReg[5].5.1 ;// output 22 ptr c0Out23->GateIo[0].DataReg[5].6.1 ;// output 23 ptr c0Out24->GateIo[0].DataReg[5].7.1 ;// output 24
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Hi Brad, Is there a way to use a local variable to specify the bit to be accessed within a motion program or plc? I tried these statements, neither of which work: gateio[0].datareg[L1].L2.1 gateio[0].datareg[L1].(L2).1 It works to use L1 to specify the data register, but it does not work to use L2 to specify the bit number. Is there a simple way to do this, or do I have to use L2 to create a mask and then read or read-modify-write the entire register? Also, I noticed that accessing the individual bits seems to work fine without the trailing ".1": if you enter gateio[0].datareg[0].0 at the gpascii command line, it returns the value of the input. gateio[0].datareg[0].0.1 works as well. Thanks, Erik
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Are you trying to define an M-Variable to this location? If so, no, you cannot dynamically change the assignment of the bit number. The best idea would be to just point to the whole word and dynamically mask to get the bit you desire. Regarding gateio[0].datareg[0].0 vs. gateio[0].datareg[0].0.1, yes, they are equivalent. When you omit the .1 at the end, PMAC assumes you wanted to just look at 1 bit.
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[quote='CharlesP' pid='1505' dateline='1299625432'] Are you trying to define an M-Variable to this location? If so, no, you cannot dynamically change the assignment of the bit number. The best idea would be to just point to the whole word and dynamically mask to get the bit you desire. Regarding gateio[0].datareg[0].0 vs. gateio[0].datareg[0].0.1, yes, they are equivalent. When you omit the .1 at the end, PMAC assumes you wanted to just look at 1 bit. [/quote] Hi Charles, Thanks for your reply. No, not trying to define an M-variable. I just want to be able to access a particular bit but I won't know which particular bit until run-time. I thought about dynamically masking as you mention. That works fine for reads, but if you only want to write to a single bit, then you have to do a read-modify-write on an entire register to make it work (that's probably how it is done underneath in the PPMAC anyway). So I need to read the register to find the values of the other bits that I don't want to change, change my particular bit, and then write the entire word back to the register, which should only change my particular bit. Thanks, Erik
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I understand what you mean. What you could do is actually declare M-Variable pointers to all of the bits you want beforehand, one M-Variable per bit, and then you can access them using array notation by bit number. For example if you predefine [code] #define c0OutBaseIndex 7000 #define BitNumber P7000 #define c0Out01 M7000 #define c0Out02 M7001 #define c0Out03 M7002 #define c0Out04 M7003 #define c0Out05 M7004 #define c0Out06 M7005 #define c0Out07 M7006 #define c0Out08 M7008 c0Out01->GateIo[0].DataReg[3].0.1 ;// output 01 c0Out02->GateIo[0].DataReg[3].1.1 ;// output 02 c0Out03->GateIo[0].DataReg[3].2.1 ;// output 03 c0Out04->GateIo[0].DataReg[3].3.1 ;// output 04 c0Out05->GateIo[0].DataReg[3].4.1 ;// output 05 c0Out06->GateIo[0].DataReg[3].5.1 ;// output 06 c0Out07->GateIo[0].DataReg[3].6.1 ;// output 07 c0Out08->GateIo[0].DataReg[3].7.1 ;// output 08 [/code] Then you can just cycle through them by M-Variable array indexing notation as such: [code] BitNumber = 0; M(c0OutBaseIndex + BitNumber) = 0; // Sets GateIo[0].DataReg[3].0.1 = 0 BitNumber = 5 M(c0OutBaseIndex + BitNumber) = 1; // Sets GateIo[0].DataReg[3].5.1= 1 [/code] That's one way to do it.
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