nfgalassi Posted March 22 Share Posted March 22 I'm using a PowerPMAC ARM Quad Core with Acontis EtherCAT master and a Kollmorgen AKD EtherCAT drive. I'm also using a ACC24E3 gatearray for the phase and servo clock. My phase clock is set to 16kHz and servo clock is set to 2kHz and the corresponding settings are set in the Kollmorgen drive (see attached screen shot). When I set the EtherCAT Master Distributed Clock Clock Adjustment setting to "Master Shift", I can activate EtherCAT without errors. As I understand it, in this mode, the EtherCAT master clock is sync'ing to the Reference Clock. But when I set it to "Bus Shift" and change FBUS.Parameter02=1 in the drive, and activate EtherCAT, I get ECAT[0].Error=$98110010 (see attached screenshot). In this mode, the Master Clock is sync'ing to the Reference Clock. My questions is, why can't I get Bus Shift to activate without error? Where can I find documentation on Acontis ECAT[0].Error? Also, what is benefit to using Master Shift vs Bus Shift? I'm using one motor in Torque Mode at the full servo rate. Should I expect to see a difference in performance from Master Shift to Bus Shift? And, how does the PMAC Servo Clock fit into this, is it the Reference Clock in Master Shift, if ECAT[0].ServoExtension=0? Thanks. Quote Link to comment Share on other sites More sharing options...
Gregs Posted March 23 Share Posted March 23 The reference clock is always provided by one of the slaves, generally the first in the chain. PMAC’s servo clock needs to be synched with the reference clock. With bus shift, the master clock is not “synching to the Reference Clock”. Rather, all the slaves synchronize to the master clock, i.e. the servo clock. Master shift is the ideal choice. I don’t know the reason, but I suppose it’s at least because, with PMAC handling all the synching, that puts less burden on the slaves. However, problems can occur if there are local axes, and the easiest way to avoid them is to instead use bus shift. See the attached document, but note that it mostly deals with issues with master shift, not bus shift. However, it does state that "certain EtherCAT Slave devices have been observed to have issues when Bus Shift mode is selected". The ECAT[0].Error can be ignored because it only applies to Etherlab, not to the Acontis stack. What does FBUS.PARAM02 do? What messages do you get when activation fails with bus shift? Synchronizing PMAC and EtherCAT Clocks.pdf Quote Link to comment Share on other sites More sharing options...
Recommended Posts
Join the conversation
You can post now and register later. If you have an account, sign in now to post with your account.