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clearing ENCLOSS on an Acc24e3 channel


ibisjoe
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The "transparent" encoder loss bit Gate3.Chan[j].LossStatus is automatically cleared as soon as the encoder signal is restored. The "latched" encoder loss bit Gate3.Chan[j].LossCapt can be cleared by writing a 0 to the bit (as documented in the description of the bit in the Software Reference Manual chapter on status elements). Of course, if there is not a valid encoder signal, it will immediately be set to 1 again.
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The "transparent" encoder loss bit Gate3.Chan[j].LossStatus is automatically cleared as soon as the encoder signal is restored. The "latched" encoder loss bit Gate3.Chan[j].LossCapt can be cleared by writing a 0 to the bit (as documented in the description of the bit in the Software Reference Manual chapter on status elements). Of course, if there is not a valid encoder signal, it will immediately be set to 1 again.

 

one might expect to find that information included (or referenced) in the ACC-24E3 HARDWARE REFERENCE manual where ENCLOSS is discussed.

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The relevant paragraph in the HW Reference manual is:

 

If the output of the XOR gate on either the A or B channel of the encoder is false, the encoder is

considered “lost”. The status bit Gate3.Chan[j].LossStatus in the channel’s status register

Gate3.Chan[j].Status is set to 1. This is a “transparent” status bit that will return to 0 if the

signal is regained. The “latched” status bit Gate3.Chan[j].LossCapt in the same register is set

to 1 if a loss is detected, and held at 1 until specifically reset (writing a 0 to the bit will reset it).

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The relevant paragraph in the HW Reference manual is:

 

If the output of the XOR gate on either the A or B channel of the encoder is false, the encoder is

considered “lost”. The status bit Gate3.Chan[j].LossStatus in the channel’s status register

Gate3.Chan[j].Status is set to 1. This is a “transparent” status bit that will return to 0 if the

signal is regained. The “latched” status bit Gate3.Chan[j].LossCapt in the same register is set

to 1 if a loss is detected, and held at 1 until specifically reset (writing a 0 to the bit will reset it).

 

I sit corrected. Thanks.

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