Jump to content
OMRON Forums

dzrong

Members
  • Posts

    187
  • Joined

  • Last visited

Posts posted by dzrong

  1. Hello Richard,

     

    I'm detect Enc loss bit of ACC24E2A in MACRO16 with UMAC,and learning "How to access encoder loss bits from MACRO16.pdf ",Would you give me some detail operation of acheve Enc lost detect on MACRO16?

     

    Because I had a problem of download of the MM varables and macroplcc,i had try something such as send CMD"MACSTA0" to open the ASCII mode of MACRO,but can't down that sucessfully.

     

    Thanks

  2. Hello,Everyone

     

    I'm setting a ACC65E in a UMAC MACRO STATION,and the base address of it is $A800,so I have to init the control words in a plc,

    you can see the code here:

    Open PLC 1 Clear

    I5111 = 2500 * 8388608 / I10 WHILE (I5111 > 0) EndW

    cmd"MS0,MI198=$40A807";set control word for Acc-65E

     

    CMD"MS0,MI199=$07" ;

    I5111 = 250 * 8388608 / I10 WHILE (I5111 > 0) EndW

    Disable PLC1

    Close

    But ,what I want to know is why the MI199 is still 0 when the power is on,of couser I had saved all the code and the PLC,and $7 is what we want.But the value of MI198 is right,so the plc1 had run,and the cmd had sent to,but what's the possble reason?

  3. Hello, Why my plc1 can't start.I had put enable plc1 into pp_startup.txt. It seems if some cmd in the config file the problem will happen. Sys.WpKey=$AAAAAAAA//MACRO Communication Setup Gate3[0].MacroEnableA=$FCCFF00; //Activate 4 Servo Nodes and 6 IO Nodes of MACRO A Gate3[0].MacroModeA=$403000; // Set MACRO A as master Sys.WpKey=0
  4. The paremeters about axis can be saved correctly.Likes:

    i5113=5

     

    Motor[1].ServoCtrl = 1

    Motor[1].pDac = Gate1[4].Chan[0].Pwm[2].a

    Motor[1].pLimits = 0

    Gate1[4].Chan[0].EncCtrl = 8

    Gate1[4].Chan[0].OutputMode = 3

    Motor[1].Servo.Kvfb=10

     

    The paremeters about Macro can be saved correctly.Likes:

    Sys.WpKey=$AAAAAAAA;

    //MACRO Communication Setup

    Gate3[0].MacroEnableA=$FCCFF00; //Activate 4 Servo Nodes and 6 IO Nodes of MACRO A

    Gate3[0].MacroModeA=$403000; // Set MACRO A as master

     

    Macro.TestPeriod=100; //MACRO Ring Check Period (Equivalent of I80)

    Macro.TestMaxErrors=2; //MACRO Maximum Ring Error Count (Equivalent of I81)

    Macro.TestReqdSynchs=2; //MACRO Minimum Sync Packet Count (Equivalent of I82)

     

    The defines can be saved correctly.Likes:

    PTR S1_Output1->Gate3[0].MacroOutA[10][2].24.1;

    PTR S1_Output2->Gate3[0].MacroOutA[10][2].25.1;

    PTR S1_Output3->Gate3[0].MacroOutA[10][2].26.1;

    PTR S1_Output4->Gate3[0].MacroOutA[10][2].27.1;

    PTR S1_Output5->Gate3[0].MacroOutA[10][2].28.1;

    PTR S1_Output6->Gate3[0].MacroOutA[10][2].29.1;

    PTR S1_Output7->Gate3[0].MacroOutA[10][2].30.1;

    PTR S1_Output8->Gate3[0].MacroOutA[10][2].31.1;

    PTR S1_Output9->Gate3[0].MacroOutA[10][3].16.1;

    PTR S1_Output10->Gate3[0].MacroOutA[10][3].17.1;

    PTR S1_Output11->Gate3[0].MacroOutA[10][3].18.1;

    PTR S1_Output12->Gate3[0].MacroOutA[10][3].19.1;

    PTR S1_Output13->Gate3[0].MacroOutA[10][3].20.1;

    PTR S1_Output14->Gate3[0].MacroOutA[10][3].21.1;

    PTR S1_Output15->Gate3[0].MacroOutA[10][3].22.1;

    PTR S1_Output16->Gate3[0].MacroOutA[10][3].23.1;

    PTR S1_Output17->Gate3[0].MacroOutA[10][3].24.1;

    PTR S1_Output18->Gate3[0].MacroOutA[10][3].25.1;

    PTR S1_Output19->Gate3[0].MacroOutA[10][3].26.1;

    PTR S1_Output20->Gate3[0].MacroOutA[10][3].27.1;

    PTR S1_Output21->Gate3[0].MacroOutA[10][3].28.1;

    PTR S1_Output22->Gate3[0].MacroOutA[10][3].29.1;

    PTR S1_Output23->Gate3[0].MacroOutA[10][3].30.1;

    PTR S1_Output24->Gate3[0].MacroOutA[10][3].31.1;

    //SECOND ACC65E ON SLAVE

    PTR S2_Input1->Gate3[0].MacroInA[11][1].16.1;

    PTR S2_Input2->Gate3[0].MacroInA[11][1].17.1;

    PTR S2_Input3->Gate3[0].MacroInA[11][1].18.1;

    PTR S2_Input4->Gate3[0].MacroInA[11][1].19.1;

    PTR S2_Input5->Gate3[0].MacroInA[11][1].20.1;

    PTR S2_Input6->Gate3[0].MacroInA[11][1].21.1;

    PTR S2_Input7->Gate3[0].MacroInA[11][1].22.1;

    PTR S2_Input8->Gate3[0].MacroInA[11][1].23.1;

    PTR S2_Input9->Gate3[0].MacroInA[11][1].24.1;

    PTR S2_Input10->Gate3[0].MacroInA[11][1].25.1;

    PTR S2_Input11->Gate3[0].MacroInA[11][1].26.1;

    PTR S2_Input12->Gate3[0].MacroInA[11][1].27.1;

    PTR S2_Input13->Gate3[0].MacroInA[11][1].28.1;

    PTR S2_Input14->Gate3[0].MacroInA[11][1].29.1;

    PTR S2_Input15->Gate3[0].MacroInA[11][1].30.1;

    PTR S2_Input16->Gate3[0].MacroInA[11][1].31.1;

    PTR S2_Input17->Gate3[0].MacroInA[11][2].16.1;

    PTR S2_Input18->Gate3[0].MacroInA[11][2].17.1;

    PTR S2_Input19->Gate3[0].MacroInA[11][2].18.1;

    PTR S2_Input20->Gate3[0].MacroInA[11][2].19.1;

    PTR S2_Input21->Gate3[0].MacroInA[11][2].20.1;

    PTR S2_Input22->Gate3[0].MacroInA[11][2].21.1;

    PTR S2_Input23->Gate3[0].MacroInA[11][2].22.1;

    PTR S2_Input24->Gate3[0].MacroInA[11][2].23.1;

     

    PTR S2_Output1->Gate3[0].MacroOutA[11][2].24.1;

    PTR S2_Output2->Gate3[0].MacroOutA[11][2].25.1;

    PTR S2_Output3->Gate3[0].MacroOutA[11][2].26.1;

    PTR S2_Output4->Gate3[0].MacroOutA[11][2].27.1;

    PTR S2_Output5->Gate3[0].MacroOutA[11][2].28.1;

    PTR S2_Output6->Gate3[0].MacroOutA[11][2].29.1;

    PTR S2_Output7->Gate3[0].MacroOutA[11][2].30.1;

    PTR S2_Output8->Gate3[0].MacroOutA[11][2].31.1;

    PTR S2_Output9->Gate3[0].MacroOutA[11][3].16.1;

    PTR S2_Output10->Gate3[0].MacroOutA[11][3].17.1;

    PTR S2_Output11->Gate3[0].MacroOutA[11][3].18.1;

    PTR S2_Output12->Gate3[0].MacroOutA[11][3].19.1;

    PTR S2_Output13->Gate3[0].MacroOutA[11][3].20.1;

    PTR S2_Output14->Gate3[0].MacroOutA[11][3].21.1;

    PTR S2_Output15->Gate3[0].MacroOutA[11][3].22.1;

    PTR S2_Output16->Gate3[0].MacroOutA[11][3].23.1;

    PTR S2_Output17->Gate3[0].MacroOutA[11][3].24.1;

    PTR S2_Output18->Gate3[0].MacroOutA[11][3].25.1;

    PTR S2_Output19->Gate3[0].MacroOutA[11][3].26.1;

    PTR S2_Output20->Gate3[0].MacroOutA[11][3].27.1;

    PTR S2_Output21->Gate3[0].MacroOutA[11][3].28.1;

    PTR S2_Output22->Gate3[0].MacroOutA[11][3].29.1;

    PTR S2_Output23->Gate3[0].MacroOutA[11][3].30.1;

    PTR S2_Output24->Gate3[0].MacroOutA[11][3].31.1;

    //ACC-36E ON MASTER

    #define ADC1 AdcDemux.ResultLow[0] //ADC1

    #define ADC2 AdcDemux.ResultLow[1] //ADC2

    #define ADC3 AdcDemux.ResultLow[2] //ADC3

    #define ADC4 AdcDemux.ResultLow[3] //ADC4

    #define ADC5 AdcDemux.ResultLow[4] //ADC5

    #define ADC6 AdcDemux.ResultLow[5] //ADC6

    #define ADC7 AdcDemux.ResultLow[6] //ADC7

    #define ADC8 AdcDemux.ResultLow[7] //ADC8

    #define ADC9 AdcDemux.ResultHigh[0] //ADC9

    #define ADC10 AdcDemux.ResultHigh[1] //ADC10

    #define ADC11 AdcDemux.ResultHigh[2] //ADC11

    #define ADC12 AdcDemux.ResultHigh[3] //ADC12

    #define ADC13 AdcDemux.ResultHigh[4] //ADC13

    #define ADC14 AdcDemux.ResultHigh[5] //ADC14

    #define ADC15 AdcDemux.ResultHigh[6] //ADC15

    #define ADC16 AdcDemux.ResultHigh[7] //ADC16

  5. I'm using PPmac with Macro system:

    The Master side are:

    POWER PMAC CPU + ACC-24E2S X 5 + ACC-5E3(16 node)+ ACC-36E+ ACC-65E + ACC-R2

     

     

    The Slave side are:

    16 Axis MACRO CPU-OPT-A + ACC-24E2S + ACC-36E + ACC-65E x 2+ ACC-R1

    So,I want to configer the ACC36E with node 2\3\6\7 and two ACC-65Es with node 10\11.

    Now the ACC-36E works well,but the ACC65E can't be controlled orrectly.

    The code are:

     

    Sys.WpKey=$AAAAAAAA;

    //MACRO Communication Setup

    Gate3[0].MacroEnableA=$FCCFF00; //Activate 4 Servo Nodes and 6 IO Nodes of MACRO

    Gate3[0].MacroModeA=$403000; // Set MACRO A as master

     

    Macro.TestPeriod=100; //MACRO Ring Check Period (Equivalent of I80)

    Macro.TestMaxErrors=2; //MACRO Maximum Ring Error Count (Equivalent of I81)

    Macro.TestReqdSynchs=2; //MACRO Minimum Sync Packet Count (Equivalent of I82)

     

    //ACC-36E on UMAC MACRO station

    // Setting up the automatic read function for the 1st ACC-36E

    MS0,MI987=1 // Enable automatic ADC read function (MACRO IC 0)

    MS0,MI988=$FF//00 ; All 16 ADCs unipolar ;$FF ; All 16 ADCs bipolar

    MS0,MI989=$8800 // Card base address

     

    MS0,MI19=4 // MACRO Station I/O Data Transfer Period (adjustable)

    MS0,MI975=$CCC // MACRO IC#0 I/O Node Enable, nodes 2, 3, 6, 7,10,11. Node 10 for 1st 65E,11 for 2st 65E

    MS0,MI173=$20C0A1000200 // 1st ACC-36E ADC1 thru ADC6 (lower 12 bits of $0200 thru $0205)

    MS0,MI174=$20C0A9000200 // 1st ACC-36E ADC9 thru ADC14 (upper 12 bits of $0200 thru $0205)

    MS0,MI175=$20C0A0000206 // 1st ACC-36E ADCs 7, 8, 15, 16 (lower + upper of $0206 thru $0207)

     

    //1ST,2ST:ACC65E

    MS0,MI160=$20C0B0008800

     

    In the global definitions file:

    PTR Input25->Acc5E3[0].MacroInA[10][0].8.1

    PTR Input26->Acc5E3[0].MacroInA[10][0].8.2

    PTR Input27->Acc5E3[0].MacroInA[10][0].8.3

    PTR Input28->Acc5E3[0].MacroInA[10][0].8.4

    PTR Input29->Acc5E3[0].MacroInA[10][0].8.5

    PTR Input30->Acc5E3[0].MacroInA[10][0].8.6

    PTR Input31->Acc5E3[0].MacroInA[10][0].8.7

    PTR Input32->Acc5E3[0].MacroInA[10][0].8.8

    PTR Input33->Acc5E3[0].MacroInA[10][0].8.9

    PTR Input34->Acc5E3[0].MacroInA[10][0].8.10

    PTR Input35->Acc5E3[0].MacroInA[10][0].8.11

    PTR Input36->Acc5E3[0].MacroInA[10][0].8.12

    PTR Input37->Acc5E3[0].MacroInA[10][0].8.13

    PTR Input38->Acc5E3[0].MacroInA[10][0].8.14

    PTR Input39->Acc5E3[0].MacroInA[10][0].8.15

    PTR Input40->Acc5E3[0].MacroInA[10][0].8.16

    PTR Input41->Acc5E3[0].MacroInA[10][0].8.17

    PTR Input42->Acc5E3[0].MacroInA[10][0].8.18

    PTR Input43->Acc5E3[0].MacroInA[10][0].8.19

    PTR Input44->Acc5E3[0].MacroInA[10][0].8.20

    PTR Input45->Acc5E3[0].MacroInA[10][0].8.21

    PTR Input46->Acc5E3[0].MacroInA[10][0].8.22

    PTR Input47->Acc5E3[0].MacroInA[10][0].8.23

    PTR Input48->Acc5E3[0].MacroInA[10][0].8.24

     

     

    PTR Output25->Acc5E3[0].MacroOutA[10][0].8.1

    PTR Output26->Acc5E3[0].MacroOutA[10][0].8.2

    PTR Output27->Acc5E3[0].MacroOutA[10][0].8.3

    PTR Output28->Acc5E3[0].MacroOutA[10][0].8.4

    PTR Output29->Acc5E3[0].MacroOutA[10][0].8.5

    PTR Output30->Acc5E3[0].MacroOutA[10][0].8.6

    PTR Output31->Acc5E3[0].MacroOutA[10][0].8.7

    PTR Output32->Acc5E3[0].MacroOutA[10][0].8.8

    PTR Output33->Acc5E3[0].MacroOutA[10][0].8.9

    PTR Output34->Acc5E3[0].MacroOutA[10][0].8.10

    PTR Output35->Acc5E3[0].MacroOutA[10][0].8.11

    PTR Output36->Acc5E3[0].MacroOutA[10][0].8.12

    PTR Output37->Acc5E3[0].MacroOutA[10][0].8.13

    PTR Output38->Acc5E3[0].MacroOutA[10][0].8.14

    PTR Output39->Acc5E3[0].MacroOutA[10][0].8.15

    PTR Output40->Acc5E3[0].MacroOutA[10][0].8.16

    PTR Output41->Acc5E3[0].MacroOutA[10][0].8.17

    PTR Output42->Acc5E3[0].MacroOutA[10][0].8.18

    PTR Output43->Acc5E3[0].MacroOutA[10][0].8.19

    PTR Output44->Acc5E3[0].MacroOutA[10][0].8.20

    PTR Output45->Acc5E3[0].MacroOutA[10][0].8.21

    PTR Output46->Acc5E3[0].MacroOutA[10][0].8.22

    PTR Output47->Acc5E3[0].MacroOutA[10][0].8.23

    PTR Output48->Acc5E3[0].MacroOutA[10][0].8.24

     

     

    PTR Input49->Acc5E3[0].MacroInA[11][0].8.1

    PTR Input50->Acc5E3[0].MacroInA[11][0].8.2

    PTR Input51->Acc5E3[0].MacroInA[11][0].8.3

    PTR Input52->Acc5E3[0].MacroInA[11][0].8.4

    PTR Input53->Acc5E3[0].MacroInA[11][0].8.5

    PTR Input54->Acc5E3[0].MacroInA[11][0].8.6

    PTR Input55->Acc5E3[0].MacroInA[11][0].8.7

    PTR Input56->Acc5E3[0].MacroInA[11][0].8.8

    PTR Input57->Acc5E3[0].MacroInA[11][0].8.9

    PTR Input58->Acc5E3[0].MacroInA[11][0].8.10

    PTR Input59->Acc5E3[0].MacroInA[11][0].8.11

    PTR Input60->Acc5E3[0].MacroInA[11][0].8.12

    PTR Input61->Acc5E3[0].MacroInA[11][0].8.13

    PTR Input62->Acc5E3[0].MacroInA[11][0].8.14

    PTR Input63->Acc5E3[0].MacroInA[11][0].8.15

    PTR Input64->Acc5E3[0].MacroInA[11][0].8.16

    PTR Input65->Acc5E3[0].MacroInA[11][0].8.17

    PTR Input66->Acc5E3[0].MacroInA[11][0].8.18

    PTR Input67->Acc5E3[0].MacroInA[11][0].8.19

    PTR Input68->Acc5E3[0].MacroInA[11][0].8.20

    PTR Input69->Acc5E3[0].MacroInA[11][0].8.21

    PTR Input70->Acc5E3[0].MacroInA[11][0].8.22

    PTR Input71->Acc5E3[0].MacroInA[11][0].8.23

    PTR Input72->Acc5E3[0].MacroInA[11][0].8.24

     

     

    PTR Output49->Acc5E3[0].MacroOutA[11][0].8.1

    PTR Output50->Acc5E3[0].MacroOutA[11][0].8.2

    PTR Output51->Acc5E3[0].MacroOutA[11][0].8.3

    PTR Output52->Acc5E3[0].MacroOutA[11][0].8.4

    PTR Output53->Acc5E3[0].MacroOutA[11][0].8.5

    PTR Output54->Acc5E3[0].MacroOutA[11][0].8.6

    PTR Output55->Acc5E3[0].MacroOutA[11][0].8.7

    PTR Output56->Acc5E3[0].MacroOutA[11][0].8.8

    PTR Output57->Acc5E3[0].MacroOutA[11][0].8.9

    PTR Output58->Acc5E3[0].MacroOutA[11][0].8.10

    PTR Output59->Acc5E3[0].MacroOutA[11][0].8.11

    PTR Output60->Acc5E3[0].MacroOutA[11][0].8.12

    PTR Output61->Acc5E3[0].MacroOutA[11][0].8.13

    PTR Output62->Acc5E3[0].MacroOutA[11][0].8.14

    PTR Output63->Acc5E3[0].MacroOutA[11][0].8.15

    PTR Output64->Acc5E3[0].MacroOutA[11][0].8.16

    PTR Output65->Acc5E3[0].MacroOutA[11][0].8.17

    PTR Output66->Acc5E3[0].MacroOutA[11][0].8.18

    PTR Output67->Acc5E3[0].MacroOutA[11][0].8.19

    PTR Output68->Acc5E3[0].MacroOutA[11][0].8.20

    PTR Output69->Acc5E3[0].MacroOutA[11][0].8.21

    PTR Output70->Acc5E3[0].MacroOutA[11][0].8.22

    PTR Output71->Acc5E3[0].MacroOutA[11][0].8.23

    PTR Output72->Acc5E3[0].MacroOutA[11][0].8.24

     

     

    Which parameters are not correct?

  6. I try another PPMAC CPU,the software version is 1.3.0.0,

    same trying,same result,p2=0 after saved and $$$.

    So, maybe it's not the CPU problem.But who's problem? The backplane?

     

    My new PPmac system is :

     

    Master:

    POWER PMAC CPU

    + ACC-24E2S X 5

    + ACC-5E3(16 node)

    + ACC-36E

    + ACC-65E

    + ACC-R2

    Slave:

    16 Axis MACRO CPU-OPT-A

    + ACC-24E2S

    + ACC-36E

    + ACC-65E x 2

    + ACC-R1

     

    And the ACC36Es and ACC24E2Ss works well both master and slave except PPmac CPU.ACC-65E on Master side work well,on the Slave side is tested now.

  7. I'm using PPower whith ACC-36E.

    After setting OK and saved,the setting will lost after reset,why?

    Should these parameter be setup once in PLC after PPMAC start?

    //ACC-36E BE SET EVERY POWER CYCLY MUST

    AdcDemux.Address[0] = $A00000

    AdcDemux.Address[1] = $A00000

    AdcDemux.Address[2] = $A00000

    AdcDemux.Address[3] = $A00000

    AdcDemux.Address[4] = $A00000

    AdcDemux.Address[5] = $A00000

    AdcDemux.Address[6] = $A00000

    AdcDemux.Address[7] = $A00000

    /**************** if bipolar , signed ********************/

    // for bipolar ACC 36E

    ADCDemux.ConvertCode[0] = $800800; // convert ADC's 1 & 9 from ADCDemux.Address[4]

    ADCDemux.ConvertCode[1] = $900900; // convert ADC's 2 & 10 from ADCDemux.Address[5]

    ADCDemux.ConvertCode[2] = $A00A00; // convert ADC's 3 & 11 from ADCDemux.Address[6]

    ADCDemux.ConvertCode[3] = $B00B00; // convert ADC's 4 & 12 from ADCDemux.Address[7]

    ADCDemux.ConvertCode[4] = $C00C00; // convert ADC's 5 & 13 from ADCDemux.Address[8]

    ADCDemux.ConvertCode[5] = $D00D00; // convert ADC's 6 & 14 from ADCDemux.Address[9]

    ADCDemux.ConvertCode[6] = $E00E00; // convert ADC's 7 & 15 from ADCDemux.Address[10]

  8. Hello Everyone,

     

    In the new manual of ACC36E,I know how to setup ACC36E in some stuation:

    USING ACC-36E WITH UMAC MACRO

    USING ACC-36E WITH POWER UMAC

    USING ACC-36E WITH TURBO UMAC

     

    But,how to setup ACC36E on UMAC MACRO STATION if the master station is PPMAC with ACC5E3 ?

     

    In the slave side I have set that:

    //ACC-36E on UMAC MACRO station

    // Setting up the automatic read function for the 1st ACC-36E

    MS0,MI987=1 // Enable automatic ADC read function (MACRO IC 0)

    MS0,MI988=$FF//00 ; All 16 ADCs unipolar ;$FF ; All 16 ADCs bipolar

    MS0,MI989=$8800 // Card base address

     

    MS0,MI19=4 // MACRO Station I/O Data Transfer Period (adjustable)

    MS0,MI975=$CCC // MACRO IC#0 I/O Node Enable, nodes 2, 3, 6, 7,10,11:10 for 1st 65E,11 for 2st 65E

    MS0,MI173=$20C0A1000200 // 1st ACC-36E ADC1 thru ADC6 (lower 12 bits of $0200 thru $0205)

    MS0,MI174=$20C0A9000200 // 1st ACC-36E ADC9 thru ADC14 (upper 12 bits of $0200 thru $0205)

    MS0,MI175=$20C0A0000206 // 1st ACC-36E ADCs 7, 8, 15, 16 (lower + upper of $0206 thru $0207)

     

    How to get the value in the PPMAC side?

     

    Thanks a lot.

  9. By the way,I6890 seems can't be set to $10,it's always $50 after we set it to $10.

    Why I6940/I6990 can't be set to $0,because we only have two MACRO GATE in ACC-5E.

    And as the manual talk,it seems if i6890 was be set to $90 will not wrong.

  10. Hello, Sina

     

    Initialization PLC for Macro? I never heard that.I'm new one in Macro!

    Is Macro needed to be initialized?

     

    All the operation steps are below:

     

    (1) Issue $$$*** to the ultralight

    (2) Download Ultralight.pmc

    (3) SAV and then $$$ to the ultralight Now we can talk to the Macro 16 station at node 0 (if sw1 set to 7).

     

    (4) MS$$$***15, Re-initialize the MACRO16 system to recognize all cards in system

    MS SAVE15 MS $$$15

    (5) Download Macro32CPUsetup.pmc to activate all nodes to be used

    (6) Issue MSSAV15 and then MS$$$15. Now system has all nodes activated and can accept the next download file

     

    (7) SAV $$$

    (8)Download Macro32CPUsetup.pmc

    (9)MS SAVE15 MS $$$15

     

     

    I think it's a MACRO CLOCK problem by setting MACRO.

    Of course my customer can replace that,but some days are needed,because the hardwares not at them elbow.

    Ultralight.pmc

  11. Hello, Sina

    It's a bad news.

    It works well only one day.

    The Encoder feedback unstable on the next day.

    Axis 17~20 ENC count changed to huge data itself after one hour,but customer do nothing only power on the PMAC.

     

    What test can be done to find the problem?

  12. Hello,Everyone

     

    The PMAC of my customer used is 32 aixs total,and it's used for 2 years,the first year it works well.But...

     

    The problem is the ACC24E2As in the slave can't be controlled sometimes,but the ACC36Es and 65E in the slave works well in the sametime.

     

    The ACC24E2As can't be controlled means the feedback of encoders totally wrong and the ENA can't be closed through Pewin32 for disable the AMPFILERS.

     

    At the beginning,the problem appear ones,but after that it disappeared,but after few days,it appears about every 20 minites after every power cycle,and now became 5 minites.

     

    One reason I think mybe the jump E16:

    I check the manual of ACC24A,it said that,the Jump E16 must be close to pin1 to 2 for used with Macro CPU,but Why I can't find it in the board of ACC24E2A.

     

    Who can give me some suggestion?

     

    Rong from China

×
×
  • Create New...